- Cadence (CDNS, Financial) introduces the Tensilica NeuroEdge 130 AI Co-Processor to enhance performance efficiency.
- The new processor claims over 30% area savings and a 20% reduction in dynamic power consumption.
- Optimized for physical AI applications, it offers high compatibility with NPUs in automotive, industrial, and mobile sectors.
Cadence Design Systems (CDNS) has unveiled the Tensilica® NeuroEdge 130 AI Co-Processor (AICP), a cutting-edge processor designed to deliver superior efficiency in AI applications. This new co-processor stands out for its ability to provide more than 30% area savings and over 20% reduction in dynamic power and energy usage, all without sacrificing performance. Tailored to complement neural processing units (NPUs), the NeuroEdge 130 AICP facilitates end-to-end execution in advanced automotive, consumer, industrial, and mobile systems on chips (SoCs).
Based on the proven architecture of the Tensilica Vision DSP family, the NeuroEdge 130 AICP excels in power, performance, and area (PPA) efficiency. It integrates seamlessly with both Cadence Neo™ NPUs and third-party NPU IP, enabling it to perform offloaded tasks with heightened performance and efficiency. The processor's VLIW-based SIMD architecture allows for high performance and low power consumption by issuing instructions to the NPU as a control processor.
This innovative processor is further bolstered by the Cadence NeuroWeave™ Software Development Kit (SDK), facilitating easy deployment and optimization of AI models for Cadence's AI IP. The SDK, leveraging the Tensor Virtual Machine (TVM) stack, provides architects the tools to manage AI layers on the NeuroEdge 130 AICP effectively.
The Co-Processor has garnered positive feedback from industry partners such as indie, MulticoreWare, and Neuchips, highlighting its role in supporting complex AI applications like autonomous vehicles, robotics, and industrial automation. The Tensilica NeuroEdge 130 AI Co-Processor is now available and ISO 26262-ready for the automotive market.