- Synopsys and Samsung Foundry collaboration achieves a 10X faster HBM3 customer tape-out with Synopsys 3DIC Compiler.
- New AI-driven digital and analog flows certified on Samsung's SF2P process.
- Expanded IP portfolio to include 224G, UCIe, MIPI, and LPDDR6 on Samsung's advanced nodes.
Synopsys, Inc. (SNPS, Financial) and Samsung Foundry have announced an enhanced strategic partnership focused on advancing AI and multi-die design innovations. A significant milestone from this collaboration includes a successful HBM3 customer tape-out utilizing the SF2 process with the Synopsys 3DIC Compiler. This achievement markedly reduced the turnaround time by tenfold, showcasing the partnership's efficiency in streamlining complex design processes.
Moreover, the partnership introduces AI-driven digital and analog flows that have been certified for Samsung's SF2P process, which is expected to optimize power, performance, and area (PPA) for semiconductor designs. These flows are part of the design technology co-optimization efforts between the two companies, aimed at delivering superior results.
Additionally, Synopsys is expanding its IP portfolio on Samsung's advanced nodes to include crucial next-generation interfaces, such as 224G, UCIe, MIPI, and LPDDR6. This expansion supports a range of applications across high-performance computing (HPC), consumer electronics, mobile, IoT, and automotive markets, potentially faster time-to-market for next-generation designs.
The partnership has further improved the HBM routing time to four hours and enhanced worst-case eye opening by 6% using Samsung's I-CubeS technology, demonstrating tangible performance advancements and reliability enhancements. This comprehensive collaboration underscores Synopsys' commitment to leveraging their EDA expertise in growing its presence in the AI and chip design market.
