Manufacturing Roadmap: Intel Is Falling Behind While AMD Might Have a Cost Problem

The 5nm semiconductor is denser and faster than 7nm. EUV continues to face headwinds

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May 09, 2018
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Taiwan Semiconductors Manufacturing Co. (TSM, Financial) recently divulged some details of its 5nm semiconductor process technology. The 5nm process will be 1.8x denser than the early 7nm process (used by Advanced Micro Devices), with a reduction of up to 20% in power at similar performance. Performance boost, in standard power terms, is expected to be 15% to 25% conditional on threshold voltage.

TSMC is already producing 7nm silicon parts at scale, with EUV-based (Extreme Ultraviolet Lithography) 7nm mass-production to kick in later. Note that EUV can boost performance and bring down costs due to elimination of multi-patterning required at leading edge semiconductor manufacturing. It seems that Taiwan Semiconductors is getting ahead of Intel Corp. (INTC, Financial), as the company is eyeing the risk production of high-performance computing silicon with 5nm during 2019. Volume production of 5nm parts is expected in 2020.

Scaling benefits aren’t the same as before

Density improvements aren’t materializing as they were in the past. TSMC more than tripled the transistor density when it jumped from 14nm to 7nm. In contrast, the density gains are less than double at 5nm when compared to 7nm. It seems that Moore’s law isn’t holding anymore.

Costs will trend higher until EUV-based volume production

Among other limitations of conventional lithography is the need for multi-patterning, which adds to the costs of production. EUV can eliminate the need for multi-patterning, resulting in cost saving. However, volume production is only possible with a use of a 250W to 300W light source. Although TSMC hit 250W during the second half of April, average daily power levels still stand at 145W. In simple terms, unless average power levels rise to 300W, the company won’t commit to EUV for mass production. This will continue to inflate costs due to the need of multi-patterning.

Power isn’t the only concern when it comes to EUV. Researchers have recently found random defects in EUV appearing at 5nm, which can affect yields making mass-production problematic. As the defects relate to 2020-bound 5nm, TSMC might not be able to follow its 5nm production roadmap. Given the newfound defects and limitations of current NXE 3400 EUV systems, 5nm mass-production using EUV power sources might not be possible in the near future.

Costs may come into play for Advanced Micro Devices

Advanced Micro Devices (AMD, Financial) will potentially have higher production costs during the first round of mass production of the next generation Zen as the company is using TSMC's 7nm (without EUV) for volume production. This will pressure AMD’s margin, as the company usually competes on pricing.

Intel has a bigger problem though

Intel has always been at the leading edge of chip manufacturing. The company always stayed ahead of competition in terms of process density and chip performance. However, the landscape is changing. Intel has delayed its 10nm launch several times now. Intel’s process was consistently superior to other foundries at similar process node. However, foundries aren’t sticking to the same node. TSMC is mass producing at 7nm, which is transistor-dense compared to Intel’s 10nm. Now, with 5nm risk production in high performance computing during 2019, Intel faces serious competition because the transistor density of TSMC’s 5nm will be twice the density of Intel’s 10nm process. See the chart below:

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Notes to the table: 5nm transistor density is projected from TSMC’s claim of 1.8x density improvement. Intel’s transistor density is extrapolated from using the past performance of Intel. GlobalFoundries’ transistor density is projected using the 7nm transistor density while using TSMC’s projected improvement as a proxy.

From TSMC’s disclosure about transistor density, the projected transistor density for 5nm is much higher as compared to Intel’s 10nm. Intel is still figuring out how to to roll out 10nm with the transistor density of 103 MTr/mm2, which is lower than the density offered by TSMC and Samsung at 7nm; 5nm is all together in a different league. In short, Intel should try to roll out earlier rather than later. Otherwise, Advanced Micro Devices is set to take market share in high performance computing amid the use of 7nm from TSMC and GlobalFoundries.

Takeaways

Although TSMC is touting the availability of EUV powered 7nm during the first half of 2019, power source problems and random defects might cause the timeline to shift further. As a result, costs will remain high, pressuring the margin of fabless manufactures like Advanced Micro Devices.

It’s too early to call on the mass-production of 5nm chips given the discovery of random defects that can potentially hurt yields. Nonetheless, 7nm remains a headache for Intel due to a higher transistor density. Intel will certainly lose market share if actual density of its 10nm falls behind the competition’s 7nm.

Disclosure: I have no positions in any stocks mentioned and no plans to initiate any positions within the next 72 hours.